NXP Semiconductors /MIMXRT1021 /IOMUXC /SW_MUX_CTL_PAD_GPIO_AD_B1_12

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Interpret as SW_MUX_CTL_PAD_GPIO_AD_B1_12

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALT0)MUX_MODE 0 (DISABLED)SION

SION=DISABLED, MUX_MODE=ALT0

Description

SW_MUX_CTL_PAD_GPIO_AD_B1_12 SW MUX Control Register

Fields

MUX_MODE

MUX Mode Select Field.

0 (ALT0): Select mux mode: ALT0 mux port: USB_OTG1_OC of instance: usb

1 (ALT1): Select mux mode: ALT1 mux port: ACMP1_OUT of instance: cmp1

2 (ALT2): Select mux mode: ALT2 mux port: LPSPI3_SCK of instance: lpspi3

3 (ALT3): Select mux mode: ALT3 mux port: USDHC2_CD_B of instance: usdhc2

4 (ALT4): Select mux mode: ALT4 mux port: FLEXIO1_FLEXIO03 of instance: flexio1

5 (ALT5): Select mux mode: ALT5 mux port: GPIO1_IO28 of instance: gpio1

6 (ALT6): Select mux mode: ALT6 mux port: FLEXPWM1_PWMA03 of instance: flexpwm1

SION

Software Input On Field.

0 (DISABLED): Input Path is determined by functionality

1 (ENABLED): Force input path of pad GPIO_AD_B1_12

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